Programmable logic devices (PLDs), such as field-programmable gate arrays (FPGAs), are user-programmable integrated circuits that can be programmed to implement user-defined logic circuits. In a typical FPGA architecture, an array of configurable logic blocks (CLBs) and a programmable interconnect structure are surrounded by a ring of programmable input/output blocks (IOBs). The programmable interconnect structure comprises interconnects and configuration memory cells. Each of the CLBs and the IOBs also includes configuration memory cells. The contents of the configuration memory cells determine how the CLB, the IOB and the programmable interconnect structure is configured. FPGAs are often flip-chip mounted in ceramic integrated circuit packages and sold as packaged FPGAs.
High performance FPGAs (for example, the Virtex-II Pro FPGA available from Xilinx Inc. of San Jose Calif.) have been observed to fail in the field in certain applications. FPGAs have been observed to fail following periods of high processing throughput in, for example, telecommunications and networking applications. In these applications, communications traffic handled by devices containing FPGAs is at time high and at other times low.
A device and method is sought for identifying the cause of failures in FPGAs that are used in applications involving periods of high processing throughput.